Chiwande SS, Dakhole PK. Ultra Efficient Reversible Logic Multiplier Design and Implementation for Low Power Application. Int J Intell Syst Appl Eng [Internet]. 2024 Jan. 7 [cited 2026 Feb. 14];12(10s):415-22. Available from: https://mail.ijisae.org/index.php/IJISAE/article/view/4390